1. Field of the Invention
The present invention relates to networking systems, and more particularly, to coupling a host bus adapter with an in-line credit extender.
2. Background of the Invention
Storage area networks (“SANs”) are commonly used where plural memory storage devices are made available to various host computing systems. Data in a SAN is typically moved from plural host systems to storage systems through various controllers/adapters.
Host systems typically include several functional components. These components may include a central processing unit (CPU), main memory, input/output (“I/O”) devices, and streaming storage devices (for example, tape drives). In conventional systems, the main memory is coupled to the CPU via a system bus or a local memory bus. The main memory is used to provide the CPU access to data and/or program information that is stored in main memory at execution time. Typically, the main memory is composed of random access memory (RAM) circuits. A computer system with the CPU and main memory is often referred to as a host system.
Host systems often communicate with storage systems via a host bus adapter (“HBA”, may also be referred to as a “controller” and/or “adapter”) using the “PCI” bus interface. PCI stands for Peripheral Component Interconnect, a local bus standard that was developed by INTEL Corporation®. The PCI standard is incorporated herein by reference in its entirety.
PCI-X is another standard bus that is compatible with existing PCI cards using the PCI bus. PCI-X improves the data transfer rate of PCI.
Various other standard interfaces are also used to move data from host systems to storage devices. Fibre Channel is one such standard. Fibre Channel (incorporated herein by reference in its entirety) is a set of AMERICAN NATIONAL STANDARD INSTITUTE (ANSI) standards, which provide a serial transmission protocol for storage and network protocols such as HIPPI, SCSI, IP, ATM and others. Fibre Channel provides an input/output interface to meet the requirements of both channel and network users.
Fibre Channel supports three different topologies: point-to-point, arbitrated loop and Fibre Channel fabric. The point-to-point topology attaches two devices directly. The arbitrated loop topology attaches devices in a loop. The Fibre Channel fabric topology attaches host systems directly to a fabric, which are then connected to multiple devices. The Fibre Channel fabric topology allows several media types to be interconnected.
Fibre Channel is a closed system that relies on multiple ports to exchange information on attributes and characteristics to determine if the ports can operate together. If the ports can work together, they define the criteria under which they communicate. In Fibre Channel, a path is established between two nodes where the path's primary task is to transport data from one point to another.
Fibre Channel fabric devices include a node port or “N_Port” that manages fabric connections. The N_port establishes a connection to a fabric element (e.g., a switch) having a fabric port or F_port.
In Fibre Channel, a buffer-to-buffer credit mechanism is used to control frame flow on a Fibre Channel link. This mechanism requires a transmitter to receive credit in the form of an R_RDY primitive, before sending a frame. The destination sends an R_RDY only when it has adequate buffer space to accept an entire frame.
Once a transmitter has sent a frame for every R_RDY it has received, it stops transmission until another R_RDY arrives from the destination. Unless the transmitter receives enough R_RDYs to cover the time needed for a frame to travel across the link to the destination and an R_RDY to return across the link from the destination, the transmitter stalls and waits for an R_RDY.
Data throughput is hindered as the length of the Fibre Channel link increases in distance. In conventional systems, additional data buffering is used to allow more R_RDYs to be sent and minimize idle periods. This solution has drawbacks. For example, devices with large buffers waste memory resources when used in an environment that only uses short links. Also, using external memory buffers is expensive and requires additional pins and data ports.
Therefore, there is a need for a system that allows efficient data transfer without using additional memory buffers permanently.